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Atom 2007.12
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Atom has evolved from a hardware description language to a reactive
system design lanugage intended for realtime control applications.

This major rewrite includes:

- New datatypes (Term, Var) leveraging GADTs.
- C and Simulink code generation.
- Basic assertion support.
- Improved rule scheduling.
- Initial standard library (Language.Atom.Common).


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Atom 2007.06
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- Separated compilation from HDL code generation to allow
  for expanded compilation options.  HDL generation now
  requires two steps:

    rtl <- compile "design_name" mySystem
    verilog rtl
    vhdl    rtl

- Added guided rule scheduling.  See Compile.compileGuided.

- Graphviz rule scheduling visualization.  <name>.dot and <name>.png
  files are produced with compile and compileGuide.  Assumes Graphviz
  "dot" is installed.  Each vertex is a rule with assigned priority.
  Gray edges are data dependencies from higher to lower priority rules.
  Red edges are data dependencies from lower to higher priority
  rules -- red edges limit concurrency.  Blue edges are hard constraints.

- Bug fix affecting alwaysActiveWhenEnabled constraint.


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Atom 2007.05
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- Removed signal labeling (label, labels) due to complications
  with analysis and control logic generation.

- Order of "display" actions within a rule is preserved in generated Verilog.

- Redefined "finish" simulation directive.

- Improved performance of rule mutual exclusion analysis.
  Trivial mutual exclusion proofs are handled without MiniSat.

- Verilog generation for systems without inputs and outputs 
  include internal reset and clock generation for simulation
  without a separate testbench.

- Added VHDL generation for synthesis only.  "display"
  and "finish" simulation directives not supported.

- Removed enabling condition from "scope".  Created "scopeEnabled".

- Misc values added:
    string
    passFail


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Atom 2007.04
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Initial release.